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@Semiengineering

Deep insights into the increasingly complex task of designing, testing, integrating, and manufacturing semiconductors. Explore the latest in Semiengineering and cutting-edge chip technology.

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  • Aug 17, 2026earliest in window
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News

Semiconductor Engineering
semiengineering.com > redefining-processes-at-sub-2nm

Redefining Processes At Sub-2nm

4+ day, 28+ min ago   (591+ words) Discrete steps are being merged with others as dimensions shrink into the angstrom range. The lines between discrete semiconductor manufacturing processes are starting to blur at sub-2nm nodes as transistors continue to shrink, sensitivity to various processes rises, and the…...

Semiconductor Engineering
semiengineering.com > beyond-conventional-ring-oscillators-purpose-built-process-detectors-for-deeper-silicon-insight

Beyond Conventional Ring Oscillators: Purpose-Built Process Detectors For Deeper Silicon Insight

4+ day, 33+ min ago   (473+ words) By Guy Cortez, Dan Alexandrescu, and Aaron Barker The semiconductor industry has invested heavily in embedded monitors to gain visibility into advanced silicon. Those monitors are essential, but the next step is not simply to collect a larger volume of…...

Semiconductor Engineering
semiengineering.com > chip-industry-technical-paper-roundup-sept-8-2

Chip Industry Technical Paper Roundup: Sept. 8

6+ day, 40+ min ago   (109+ words) HBF for LLM inference; M3D SRAM with BEOL pass-gates at 2nm; distributed GPU architectures; hybrid HBM-HBF memory; GaN-on-silicon polarization superjunctions; programmable silicon photonics; Al dopant activation in 4H-SiC. The post Chip Industry Technical Paper Roundup: Sept. 8 appeared first on Semiconductor Engineering. Chip…...

Semiconductor Engineering
semiengineering.com > chip-industry-week-in-review-154

Chip Industry Week In Review

1+ week, 3+ day ago   (328+ words) In-Depth Reports and Deals New Technologies Security Vehicles Research Quantum Workforce | Education Events and Webinars EPFL researchers demonstrated a GaN-on-Si transistor using a polarization superjunction that sustained more than 3.4 kV, along with diodes that exceeded 3.9 kV. Seoul National University-led researchers…...

Semiconductor Engineering
semiengineering.com > protecting-mission-critical-data-beyond-the-soc-why-inline-memory-encryption-needs-integrity

Protecting Mission-Critical Data Beyond The SoC: Why Inline Memory Encryption Needs Integrity

1+ week, 4+ day ago   (320+ words) By Vincent van der Leest and Ajay Kapoor The same principle applies beyond aerospace and government systems: manipulated medical or financial data can affect critical decisions, while altered training data, model parameters, or inference inputs can poison an AI system....

Semiconductor Engineering
semiengineering.com > what-can-go-wrong-in-800vdc-ai-data-centers

What Can Go Wrong In 800VDC AI Data Centers

1+ week, 4+ day ago   (536+ words) Sparks and fires caused by higher electrical currents can cause costly outages and put people in danger. Hot chips also cause problems. Demand for power in modern data centers shows no sign of stopping, as it supports an expanding range…...

Semiconductor Engineering
semiengineering.com > security-in-the-era-of-quantum-computing

Security In The Era Of Quantum Computing

1+ week, 5+ day ago   (237+ words) Enable robust cryptographic mechanisms that remain resilient even against quantum-based computational attacks. The post Security In The Era Of Quantum Computing appeared first on Semiconductor Engineering. Rapid advancements in quantum computing present both opportunities and significant threats to existing cryptographic…...

Semiconductor Engineering
semiengineering.com > research-bits-sep-1

Research Bits: Sep. 1

1+ week, 6+ day ago   (256+ words) Researchers from Ecole Polytechnique Fédérale de Lausanne (EPFL) debuted a new class of gallium nitride (GaN) transistor, called an intrinsic polarization superjunction (iPSJ), that can handle very high voltage with minimal energy loss. Made from layers of GaN on a…...

Semiconductor Engineering
semiengineering.com > chip-industry-technical-paper-roundup-sep-1

Chip Industry Technical Paper Roundup: Sep. 1

1+ week, 6+ day ago   (98+ words) Semiconductor Engineering Chip Industry Technical Paper Roundup: Sep. 1 Wafer-scale optical interconnects for LLM training; Rowhammer-based inference attacks; 3D-IC test cases; liquid cooling for 2.5D/3D packages; wafer-scale 2D semi growth; DL-based parameter extraction for 2D transistors; and chip-placement optimization. New technical papers recently added…...

Semiconductor Engineering
semiengineering.com > multi-die-assemblies-dominate-at-2nm-and-below

Multi-Die Assemblies Dominate At 2nm And Below

3+ week, 41+ min ago   (997+ words) Chips are getting bigger, more modular, and much more capable as new innovations mix with existing processes and long-researched projects go mainstream. Multi-die assemblies and heterogeneous integration are becoming standard in leading-edge servers and high-end edge devices, forcing broad changes…...