News
Backside Power Delivery Creates Fab Tool, Thermal Dissipation Barriers
1+ hour, 48+ min ago (936+ words) Moving the power delivery network to the backside of a chip reduces congestion, but it introduces new challenges for fabs. Fig. 1: SEM image shows details of the PowerVia backside power connection. Source: Intel Backside PDNs boost power efficiency and power…...
New Performance Requirements For Audio
1+ hour, 49+ min ago (98+ words) Audio interactions with machines is driving increasing demand for better sound quality. The post New Performance Requirements For Audio appeared first on Semiconductor Engineering. Demand for higher performance in audio is rising as human-machine interactions increase on the edge. That…...
Electrical Model of the Bitflip in SRAM Under Laser Illumination Simulating Laser Fault Injection
10+ hour, 3+ min ago (164+ words) A new technical paper, "Electrical modelisation of a bitflip in SRAM cell memory induced by laser fault injection," was published by researchers at Univ Rennes, CNRS, IETR. Abstract "An electrical model of the bitflip in SRAM under laser illumination simulating…...
Accelerator Architecture: Fusion-Aware Mapper (MIT)
10+ hour, 22+ min ago (364+ words) Researchers from MIT published "Fast and Fusiest: An Optimal Fusion-Aware Mapper for Accelerator Modeling and Evaluation." Abstract "The latency and energy of tensor algebra accelerators depend on how data movement and operations are scheduled (i.e., mapped) onto accelerators, so determining the…...
Survey of GenAI Across the Full Computing Stack, From SW To Silicon (Harvard)
11+ hour, 37+ min ago (417+ words) Harvard University researchers published "GenAI for Systems: Recurring Challenges and Design Principles from Software to Silicon." Abstract "Generative AI is reshaping how computing systems are designed, optimized, and built, yet research remains fragmented across software, architecture, and chip design communities....
C2i Semiconductors Archives
2+ day, 13+ hour ago (68+ words) C2i Semiconductors Archives'Semiconductor Engineering Chip Industry Week in Review AI's Impact On Engineering Jobs May Be Different Than Expected Can A Computer Science Student Be Taught To Design Hardware? Chiplet Fundamentals For Engineers: eBook Securing Hardware For The Quantum Era Balancing…...
Nanoscale MoS₂-based Memristors Integrated into CMOS Microchips
2+ day, 16+ hour ago (355+ words) A new technical paper, "Integration of Low-Voltage Nanoscale MoS2 Memristors on CMOS Microchips" was published by RWTH Aachen and Forschungszentrum J'lich GmbH. Abstract "2D materials (2DMs) are gaining increased attention for applications such as advanced electronics and neuromorphic computing due to their excellent…...
Chip Industry Week in Review
3+ day, 1+ hour ago (662+ words) ISSCC research blitz; $50M for agentic AI; 3D interconnects tool; Ultra Ethernet security; Watt's Law and power supply ceiling; Intel-Google security stress test; heat techniques; chip architectures at the edge; ChipPath career program. The IEEE ISSCC conference was held this week in…...
The On-Device LLM Revolution
3+ day, 1+ hour ago (1044+ words) Why 3B to 30B models are moving to the edge " and what that means for silicon. This isn't a passing trend. It's an architectural inflection point driven by latency requirements, privacy mandates, cost pressures, and user experience demands that cloud inference simply…...
Redefining Backside Metallization: Low‑Temperature Solutions For HDFO And S‑SWIFT Designs
4+ day, 1+ hour ago (553+ words) Efficient heat dissipation is critical in fan-out packages. Fig. 1: Structure and current flow of power device and S-SWIFT packaging. (a) Power devices " vertical connection of thermal and electrical (illustrated only soldering area between die and Cu with BSM) and (b) S-SWIFT design…...